Abstract: With the increase
of internet protocol (IP) packets the performance of routers became an
important issue in internetworking. In this paper we examined the matching
algorithm in gigabit router which has input queue with virtual output queueing.
Port partitioning concept is employed
to reduce the computational burden of the scheduler within a switch. The
input and output ports are divided into two groups such that the matching
algorithm is implemented within each group in parallel. The matching is
performed by exchanging input and output port groups at every time slot
to handle all incoming traffics. Two algorithms, maximal weight matching
by port partitioning (MPP) and modified maximal weight matching with port
partitioning (MMPP) are presented. MMPP has the lowest delay for every
packet arrival rate. The buffer size on a port is approximately 20-60 packets
depending on the packet arrival rates. The throughput is illustrated to
be linear to the packet arrival rate, which can be achieved under highly
efficient matching algorithm.